alvd | | | | | | | | | | | | | | | with voltage control standard specifications: applications: ? sonet, xdsl ? sdh, cpe ? stb features: ? based on a proprietary digital multiplier ? tri-state output ? low phase jitter ? 3.3v +/- 5% operation ? ceramic smd, low profile package 7 . 0 x 5 . 0 x 1 . 8 m m pb rohs compliant abracon is iso 9001 / qs 9000 ce r tified abracon is iso 9001 / qs 9000 ce r tified ceramic smd crystal clock oscillator 303 3 2 e s p e ranz a , r a n c h o s a n t a m a r g a r i t a , c a li f o r n i a 926 8 8 te l 949-546-800 0 | f a x 949-546-80 0 1 | w w w . abr a c o n . c o m revised: 07.22.09 visit www.abracon.com for terms & conditions of sale p abracon p/n: alvd series frequency range: 750 khz to 800 mh z operating temperature: 0c to +70c (see options) storage temperature: -55c to +125c overall frequency stability: 50 ppm max. (see options) supply voltage (v dd ): 3.3v 10% voltage control (v c ): 0.3vdc min, 1.65vdc typ, 3.0 vdc max. symmetry at 1/2 vdd: 40/60% max. output level: see options (pecl, cmos, or lvds) pullability: 50ppm (see option) tristate function: "1" (v ih >= 0.7* vdd) or open: oscillation "0" (v il < 0.3* vdd) : hi z aging per year: 5 ppm max. rms phase jitter: 3ps typical, 5ps max. (12khz~20mhz) period jitter (peak to peak): 35 ps typical phase noise: -112 dbc/hz @ 1khz offset from 155.52mhz -125 dbc/hz @ 10khz offset from 155.52mhz -123 dbc/hz @ 100khz offset from 155.52mhz -109 dbc/hz @ 1khz offset from 622.08mhz -110 dbc/hz @ 10khz offset from 622.08mhz -109 dbc/hz @ 100khz offset from 622.08mhz pecl: supply current (i dd ): 25ma max (for fo<24mhz),65ma max (for 24mhz alvd | | | | | | | | | | | | | | | with voltage control 7 . 0 x 5 . 0 x 1 . 8 m m pb rohs compliant abracon is iso 9001 / qs 9000 ce r tified abracon is iso 9001 / qs 9000 ce r tified ceramic smd crystal clock oscillator options & part identification: (left blank if standard) 303 3 2 e s p e ranz a , r a n c h o s a n t a m a r g a r i t a , c a li f o r n i a 926 8 8 te l 949-546-800 0 | f a x 949-546-80 0 1 | w w w . abr a c o n . c o m revised: 07.22.09 visit www.abracon.com for terms & conditions of sale pin assignments pin # 1 2 3 4 5 6 tri-state pin operation: 0 (default) 1 0 1 0 1(default) 0 1(default) *connect to vdd for logic level "1", connect to ground for logic level "0". r 25ppm max . blan k bulk k 30ppm max. h 35ppm max. d -10oc~6 0 oc e -20oc~7 0 oc f -30oc~7 0 oc p pec l n10 0 100ppm n -30oc~8 5 oc p 1 pecl1 l -40oc~8 5 oc v lvds c cmos e t a t s i r t e t a t s i r t xx.xxxxmhz alvd - frequency - - - - - . c n r o , s d v l , l c e p y r a t n e m i l p m o c q v dd vdd connection. pullability frequency stability t tape and reel n o i t p i r s e d e m a n l o r t n o c e g a t l o v c v operating temp. output level packaging frequency pecl enabled disabled d n u o r g d n g . t u p t u o s o m c r o , s d v l , l c e p q disabled enabled output typ e option pin 2 logic level* disabled enabled p 1 pecl1 output state (tri-state) p c cmos disabled enabled v lvds outline drawing: *complimentary pecl/lvds or nc. note: recommend using an approximately 0.01uf bypass capacitor between pin 3 and 6. pin # 1 2 3 4 *5 6 gnd function vc tri-state q v dd q dimensions: inches (mm)
alvd | | | | | | | | | | | | | | | with voltage control 7 . 0 x 5 . 0 x 1 . 8 m m pb rohs compliant abracon is iso 9001 / qs 9000 ce r tified abracon is iso 9001 / qs 9000 ce r tified ceramic smd crystal clock oscillator tape & reel: dimensions: mm 303 3 2 e s p e r anz a , r a n c h o s a n t a m a r g a r i t a , c a li f o r n i a 926 8 8 t e l 949-546-800 0 | f a x 949-546-80 0 1 | w w w . ab r a c o n . c o m revised: 07.22.09 visit www.abracon.com for terms & conditions of sale tape and reel (1,000pcs/reel) note: a b r a c on manufa c tu r ed p r o du c ts a r e i n t ended f or gene r al c omme r cial and indust r ial us e . f or appli c a tions r equi r ing high r eliabili t y and/or p r ese n ting e x t r eme o p e r a ting e n vi r onme n t , w r it t en c onse n t & autho r iz a tion f r om a b r a c on is r equi r e d . reflow profile:
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